|
Name/Description |
Formula
/ Equation |
|
Ohm's Law |
V = IR;
I = V/R; R=V/I
where V and I are respectively the voltage across and current
through a resistor with resistance R;
P = VI
= I2R = V2/R
where P is the power dissipated |
|
Resistors in Series/Parallel |
Resistors in Series:
Reff =
R1 + R2 + R3 + ... + RN
Resistors in Parallel:
1/Reff
= 1/R1 + 1/R2 + 1/R3 + ... + 1/RN |
|
Capacitors in Series/Parallel |
Capacitors in Series:
1/Ceff
= 1/C1 + 1/C2 + 1/C3 + ... + 1/CN
Capacitors in Parallel:
Ceff =
C1 + C2 + C3 + ... + CN |
|
Inductors in Series/Parallel |
Inductors in Series:
Leff =
L1 + L2 + L3 + ... + LN
Inductors in Parallel:
1/Leff
= 1/L1 + 1/L2 + 1/L3 + ... + 1/LN |
|
Capacitance |
C =
q/V;
q = CV; V=q/C
where
V and q are respectively the voltage across and charge in a
capacitor with capacitance C;
v =
1/C ∫ idt; i = C dv/dt
where
i is the current through the capacitor and v is the voltage across
the capacitor |
|
Inductance |
i =
1/L ∫ vdt; v = L di/dt
where
i is the current through the inductor and v is the voltage across
the inductor |
|
Bipolar
Transistor Formulas |
hfe =
ic / ib; hFE = Ic / Ib
where
hfe/hFE are the ac and dc forward current transfer ratios, resp.,
ic and Ic are the ac and dc collector currents, ib and Ib are the
ac and dc base currents;
Gm =
ic / Vbe
where Gm is the mutual conductance, ic is the ac signal
collector-emitter current, and vbe is the base-emitter voltage;
note: voltage gain
G = Gm
x Rload
hie =
hfe / Gm
where
hie is the input resistance, which also equals the base input
voltage divided by the base current
|
|
JFET
Formulas |
Vp =
Vpo + Vgs
where
Vgs is the gate-source voltage, Vp is the drain-source voltage
that causes pinch off, Vpo is the drain-source voltage at which
saturation begins when Vgs = 0;
BVds =
BVdso + Vgs
where
BVds is the breakdown voltage and BVdso is the breakdown voltage
when Vgs = 0 |
|
MOSFET
Formulas |
NMOS:
Vds = Vgs + Vth; PMOS: Vsd = Vsg - Vth; where
Vds and Vsd are the drain-source and source-drain voltages needed
for pinch-off, resp., Vgs and Vsg are the gate-source and
source-gate voltages, and Vth is the MOSFET's threshold voltage |
|
de Morgan's Theorem |
A · B
= A
+
B;
A + B
=
A
·
B
where A and
B are digital logic states
|
|
Inductive Reactance |
X = 2πfL
where
X is the inductive reactance, L is the
inductance,
and f is the frequency of the signal;
v = X
Icos2πft
where v is the voltage across an inductance L if a sinusoidal
current i = I sin 2πft
is passed through it, where I and f are the amplitude and
frequency of the current, resp.
Note:
In an inductance, current lags the voltage by 90 deg. |
|
Capacitive Reactance |
X = 1
/ (2πfC)
where X is the capacitive reactance, C is the
capacitance,
and f is the frequency of the signal;
i =
Vcos2πft/X
where i is the current through an capacitance C if a sinusoidal
voltage v = V sin 2πft
is applied across it, where V and f are the amplitude and
frequency of the voltage, resp.
Note:
In a capacitance, the voltage lags the current by 90 deg. |
